A 1.3 GSample/s 10-tap full-rate variable latency self-timed FIR filter with clocked interfaces
- Jose Tierno
- Alexander Rylyakov
- et al.
- 2002
- ISSCC 2002
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19 results for Michael J. Immediato
A 1.3 Gsample/s 10-tap full-rate variable-latency self-timed FIR filter with clocked interfaces
- Jose Tierno
- Alexander Rylyakov
- et al.
- 2002
- ISSCC 2002
A 2.3GSample/s 10-tap digital FIR filter for magnetic recording read channels
- S. Rylov
- A. Rylyakov
- et al.
- 2001
- ISSCC 2001
Asynchronous interlocked pipelined CMOS circuits operating at 3.3-4.5Ghz
- S.E. Schuster
- W. Reohr
- et al.
- 2000
- ISSCC 2000
250 MHz digital FIR filters for PRML disk read channels
- D.J. Pearson
- S.K. Reynolds
- et al.
- 1995
- ISSCC 1995
A 5Gb/s 16×16 Si-bipolar crosspoint switch
- Hyun Shin
- James Warnock
- et al.
- 1992
- ISSCC 1992
A 3-transistor DRAM cell with gated diode for enhanced speed and retention time
- Wing K. Luk
- Jin Cai
- et al.
- 2006
- VLSI Circuits 2006
Minimizing inductive noise in system-on-a-chip with multiple power gating structures
- Suhwan Kim
- Stephen V. Kosonocky
- et al.
- 2003
- ESSCIRC 2003
Enhanced multi-threshold (MTCMOS) circuits using variable well bias
- S.V. Kosonocky
- M.J. Immediato
- et al.
- 2001
- ISLPED 2001
Designing a testable System on a Chip
- S.V. Kosonocky
- A.A. Bright
- et al.
- 1998
- VTS 1998