Controlled-load limited switch dynamic logic circuit
- Jayakumaran Sivagnaname
- Hung C. Ngo
- et al.
- 2005
- ISQED 2005
Publications
Date
Featured collections
Popular topics
23 results for Hung C. Ngo
Dynamic circuit techniques using independently controlled double-gate devices
- J.B. Kuang
- K. Kim
- et al.
- 2005
- IEEE International SOI Conference 2005
A low-overhead virtual rail technique for SRAM leakage power reduction
- J.B. Kuang
- Hung Ngo
- et al.
- 2005
- ICCD 2005
A low latency and low power dynamic carry save adder
- Ramyanshu Datta
- Jacob A. Abraham
- et al.
- 2004
- ISCAS 2004
Design methodology for a 1.0 GHz microprocessor
- S.D. Posluszny
- Naoaki Aoki
- et al.
- 1998
- ICCD 1998
TCAD/physics-based analysis of high-density dual-BOX FD/SOI SRAM cell with improved stability
- Keunwoo Kim
- Jente B. Kuang
- et al.
- 2009
- IEEE Transactions on Electron Devices
A 1 MB cache subsystem prototype with 1.8 ns embedded DRAMs in 45 nm SOI CMOS
- Peter J. Klim
- John Barth
- et al.
- 2009
- IEEE Journal of Solid-State Circuits
Circuit techniques utilizing independent gate control in double-gate technologies
- Jente B. Kuang
- Keunwoo Kim
- et al.
- 2008
- IEEE Transactions on VLSI Systems
Low-power high-performance asymmetrical double-gate circuits using back-gate-controlled wide-tunable-range diode voltage
- Keunwoo Kim
- Ching-Te Chuang
- et al.
- 2007
- IEEE Transactions on Electron Devices
Limited switch dynamic logic circuits for high-speed low-power circuit design
- Wendy Belluomini
- Damir Jamsek
- et al.
- 2006
- IBM J. Res. Dev