IBM POWER9 circuit design and energy optimization for 14-nm technology
- Eric J. Fluhr
- R.M. Rao
- et al.
- 2018
- IBM J. Res. Dev
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38 results for R.M. Rao
IBM POWER8 circuit design and energy optimization
- Victor Zyuban
- Joshua Friedrich
- et al.
- 2015
- IBM J. Res. Dev
Efficient PVT independent abstraction of large IP blocks for hierarchical power analysis
- Nagu Dhanwada
- David Hathaway
- et al.
- 2013
- ICCAD 2013
Slew-rate monitoring circuit for on-chip process variation detection
- Amlan Ghosh
- Rahul M. Rao
- et al.
- 2013
- IEEE Transactions on VLSI Systems
Usage-based degradation of SRAM arrays due to bias temperature instability
- Aditya Bansal
- Jae-Joon Kim
- et al.
- 2012
- IRPS 2012
Impact of die-to-die thermal coupling on the electrical characteristics of 3D stacked SRAM cache
- Subho Chatterjee
- Minki Cho
- et al.
- 2012
- SEMI-THERM 2012
Separating NBTI and PBTI effects on the degradation of ring oscillator frequency
- Barry P. Linder
- Jae-Joon Kim
- et al.
- 2011
- IIRW 2011
PBTI/NBTI monitoring ring oscillator circuits with on-chip Vt characterization and high frequency AC stress capability
- Jae-Joon Kim
- Rahul M. Rao
- et al.
- 2011
- VLSI Circuits 2011
A robust reliability methodology for accurately predicting Bias Temperature Instability induced circuit performance degradation in HKMG CMOS
- D.P. Ioannou
- K. Zhao
- et al.
- 2011
- IRPS 2011
Reliability monitoring ring oscillator structures for isolated/combined NBTI and PBTI measurement in high-k metal gate technologies
- Jae-Joon Kim
- Barry P. Linder
- et al.
- 2011
- IRPS 2011