Extremely-scaled double-gate CMOS with non-self-aligned back gate
- Keunwoo Kim
- Hussein I. Hanafi
- et al.
- 2005
- VLSI Technology 2005
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79 results for Keunwoo Kim
Modeling and analysis of total leakage currents in nanoscale double gate devices and circuits
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2005
- ISLPED 2005
Novel high-density low-power high-performance double-gate logic techniques
- Meng-Hsueh Chiang
- Keunwoo Kim
- et al.
- 2004
- IEEE International SOI Conference 2004
FinFET SRAM for high-performance low-power applications
- Rajiv V. Joshi
- Richard Q. Williams
- et al.
- 2004
- ESSDERC/ESSCIRC 2004
Nanoscale CMOS Circuit Leakage Power Reduction by Double-Gate Device
- Keunwoo Kim
- Koushik K. Das
- et al.
- 2004
- ISLPED 2004
Nanoscale CMOS circuit leakage power reduction By Double-gate device
- Keunwoo Kim
- Koushik K. Das
- et al.
- 2004
- ISLPED 2004
Analysis and modeling methodology of strained-Si channel-on-insulator (SSOI) MOSFETs
- Keunwoo Kim
- Ching-Te Chuang
- et al.
- 2003
- VLSI-TSA 2003
A New Dynamic Beta-Ratio Circuit Technique for Strained-Si Technology
- Rajiv V. Joshi
- Keunwoo Kim
- et al.
- 2003
- IEEE International SOI Conference 2003
Physical compact model for threshold voltage in short-channel double-gate devices
- Keunwoo Kim
- J.G. Fossum
- et al.
- 2003
- SISPAD 2003
Strained-Si devices and circuits for low-power applications
- Keunwoo Kim
- R.V. Joshi
- et al.
- 2003
- ISLPED 2003