Wide-frequency-range resonant clock with on-the-fly mode changing for the POWER8TM microprocessor
- Phillip Restle
- David Shan
- et al.
- 2014
- ISSCC 2014
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26 results for Thomas Bucelot
Enhanced performance of accumulation mode 0.5 μ m CMOS/SOI operated at 300 K and 85 K
- L.K. Wang
- J. Seliskar
- et al.
- 1991
- IEDM 1991
HIGHLY LATCHUP-IMMUNE 1- mu m CMOS TECHNOLOGY FABRICATED WITH 1 Mev ION IMPLANTATION AND SELF-ALIGNED TiSi//2.
- F.S. Lai
- L.K. Wang
- et al.
- 1984
- IEDM 1984
Indium Channel Implant for Improved Short-Channel Behavior of Submicrometer NMOSFET's
- G. Shahidi
- Bijan Davari
- et al.
- 1993
- IEEE Electron Device Letters
Resonant clock mega-mesh for the IBM z13™
- David Shan
- Phillip Restle
- et al.
- 2015
- VLSI Circuits 2015
On-chip circuit for measuring multi-GHz clock signal waveforms
- Keith A. Jenkins
- P. Restle
- et al.
- 2013
- VTS 2013
Timing derived current for signal net reliability assessment
- Jiedong Diao
- Jim Venuto
- et al.
- 2005
- VMIC 2005
Characterization of the impact of interconnect design on the capacitive load driven by a global clock distribution
- G.G. Lopez
- G. Fiorenza
- et al.
- 2005
- GLSVLSI 2005
CPAM: A common power analysis methodology for high-performance VLSI design
- J.Scott Neely
- Howard H. Chen
- et al.
- 2000
- IEEE Topical Meeting EPEPS 2000
A room temperature 0.1 μm CMOS on SOI
- G. Shahidi
- C. Blair
- et al.
- 1993
- VLSI Technology 1993