Victor Zyuban, Joshua Friedrich, et al.
IBM J. Res. Dev
An efficient loop-based interconnect modeling methodology is proposed for multi-GHz clock network design. High frequency effects, including inductance and proximity effects are captured. The results are validated through comparisons with electromagnetic simulations and measured data taken from a Power4 chip.
Victor Zyuban, Joshua Friedrich, et al.
IBM J. Res. Dev
Joachim Clabes, Joshua Friedrich, et al.
ISSCC 2003
Joseph Kozhaya, Phillip Restle, et al.
ICCAD 2011
Jiedong Diao, Jim Venuto, et al.
VMIC 2005