High performance 14nm SOI FinFET CMOS technology with 0.0174μm2 embedded DRAM and 15 levels of Cu metallization
- C.-H.C-H. Lin
- Brian Greene
- et al.
- 2014
- IEDM 2014
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34 results for K. Stein
Novel high-performance analog devices for advanced low-power high-k metal gate complementary metal-oxide-semiconductor technology
- Jin-Ping Han
- Takashi Shimizu
- et al.
- 2011
- Japanese Journal of Applied Physics
Performance elements for 28nm gate length bulk devices with gate first high-k metal gate
- Jun Yuan
- C. Gruensfelder
- et al.
- 2010
- ICSICT 2010
High-κ/metal gate low power bulk technology - Performance evaluation of standard CMOS logic circuits, microprocessor critical path replicas, and SRAM for 45nm and beyond
- D.-G. Park
- K. Stein
- et al.
- 2009
- VLSI-TSA 2009
A cost effective 32nm high-K/metal gate CMOS technology for low power applications with single-metal/gate-first process
- X. Chen
- S. Samavedam
- et al.
- 2008
- VLSI Technology 2008
A 0.35 μm SiGe BiCMOS technology for power amplifier applications
- Alvin Joseph
- Qizhi Liu
- et al.
- 2007
- BCTM 2007
Scalability of Direct Silicon Bonded (DSB) technology for 32nm node and beyond
- Haizhou Yin
- C.Y. Sung
- et al.
- 2007
- VLSI Technology 2007
Present status and future directions of SiGe HBT technology
- Marwan H. Khater
- Thomas N. Adam
- et al.
- 2006
- LEC 2006
Pushing the performance limits of SiGe HBT technology
- Marwan Khater
- Thomas Adam
- et al.
- 2006
- ECS Meeting 2006
SiGe HBT technology with f max/f T = 350/300 GHz and gate delay below 3.3 ps
- M. Khater
- J.-S. Rieh
- et al.
- 2004
- IEDM 2004