A 1.2 ns/1 ns 1 K∗16 ECL dual-port cache RAM
- Hyun J. Shin
- P.F. Lu
- et al.
- 1993
- ISSCC 1993
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30 results for Robert Franch
Optical measurement of internal logic patterns in a flip-chip mounted silicon SRAM integrated circuit
- H. Heinrich
- N. Pakdaman
- et al.
- 1992
- LEOS 1992
Advances in Membrane Probe Technology
- J. Kister
- R.L. Franch
- 1992
- IEEE ITC 1992
A Large VDSData Retention Test Pattern for DRAM’s
- R.L. Franch
- S. Dhong
- et al.
- 1992
- IEEE Journal of Solid-State Circuits
Measurement of VLSI Power Supply Current by Electron-Beam Probing
- Keith A. Jenkins
- Robert L. Franch
- 1992
- IEEE Journal of Solid-State Circuits
A 4-Mb Low-Temperature DRAM
- Rick L. Mohler
- Christopher W. Long
- et al.
- 1991
- IEEE Journal of Solid-State Circuits
A 2-ns Cycle, 3.8-ns Access 512-kb CMOS ECL SRAM with a Fully Pipelined Architecture
- Terry I. Chappell
- Barbara A. Chappell
- et al.
- 1991
- IEEE Journal of Solid-State Circuits
Experimental 27 ns 1 Mb CMOS high-speed DRAM
- S. Dhong
- W.H. Henkels
- et al.
- 1989
- VLSI Circuits 1989
Low temperature 12 ns DRAM
- W.H. Henkels
- N.C.-C. Lu
- et al.
- 1989
- VLSI-TSA 1989
Low temperature SER and noise in a high speed DRAM
- W.H. Henkels
- N.C.-C. Lu
- et al.
- 1989
- Workshop on Low Temperature Semiconductor Electronics 1989