Contact Cavity Shaping and Selective SiGe:B Low-Temperature Epitaxy Process Solution for sub 10-9 Ω.cm2 Contact Resistivity in Nonplanar FETs
- N. Breil
- B.-C. Lee
- et al.
- 2023
- VLSI Technology 2023
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58 results for B. Haran
Gate-Last IO Transistors based on Stacked Gate-All-Around Nanosheet Architecture for Advanced Logic Technologies
- M. Bhuiyan
- M. Kim
- et al.
- 2021
- IEDM 2021
Impact of Nanosecond Laser Anneal on PVD Ru Films
- D. Sil
- Yasir Sulehria
- et al.
- 2021
- IITC 2021
Selective deposition of AlOx for Fully Aligned Via in nano Cu interconnects
- Son Van Nguyen
- Hosadurga Shobha
- et al.
- 2021
- IITC 2021
Dual Damascene BEOL Extendibility With Cu Reflow / Selective TaN And Co/Cu Composite
- P. Bhosale
- N. Lanzillo
- et al.
- 2021
- VLSI Technology 2021
Enabling Next Generation CMOS by Novel EOT Scaling Module
- Lin Dong
- Steven Hung
- et al.
- 2021
- VLSI Technology 2021
Challenges and Opportunities for Stacked Transistor: DTCO and Device
- J. Wang
- S.D. Suk
- et al.
- 2021
- VLSI Technology 2021
Stacked Gate-All-Around Nanosheet pFET with Highly Compressive Strained Si1-xGex Channel
- Shogo Mochizuki
- M. Bhuiyan
- et al.
- 2020
- IEDM 2020
Improved Air Spacer for Highly Scaled CMOS Technology
- Kangguo Cheng
- Chanro Park
- et al.
- 2020
- IEEE Transactions on Electron Devices
Parasitic Resistance Reduction for Aggressively Scaled Stacked Nanosheet Transistors
- Su-Chen Fan
- Ruilong Xie
- et al.
- 2020
- IITC 2020