Publications

33 results for Kohji Hosokawa

A 5.3GHz 8T-SRAM with operation down to 0.41V in 65nm CMOS
- - Leland Chang
  - Yutaka Nakamura
  - et al.
- 2007
- VLSI Circuits 2007
A 220-mm², four- and eight-bank, 256-Mb SDRAM with single-sided stitched WL architecture
- - Toshiaki Kirihata
  - Martin Gall
  - et al.
- 1998
- IEEE Journal of Solid-State Circuits
220 mm² 4 and 8 bank 256 Mb SDRAM with single-sided stitched WL architecture
- - T. Kirihata
  - M. Gall
  - et al.
- 1998
- ISSCC 1998