22nm technology yield optimization using multivariate 3D virtual fabrication
- B. Cipriany
- B. Jagannathan
- et al.
- 2013
- SISPAD 2013
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13 results for Jason Meiring
Enabling reverse tone imaging for via levels using attenuated Phase Shift Mask and source optimization
- Bassem Hamieh
- Hyun Chol Choi
- et al.
- 2013
- SPIE Advanced Lithography 2013
High performance bulk planar 20nm CMOS technology for low power mobile applications
- Huiling Shang
- Sameer Jain
- et al.
- 2012
- VLSI Technology 2012
Applicability of global source mask optimization to 22/20nm node and beyond
- Kehan Tian
- Moutaz Fakhry
- et al.
- 2011
- SPIE Advanced Lithography 2011
Fundamental investigation of Negative Tone Development (NTD) for the 22nm node (and beyond)
- Guillaume Landie
- Yongan Xu
- et al.
- 2011
- SPIE Advanced Lithography 2011
Demonstrating the benefits of source-mask optimization and enabling technologies through experiment and simulations
- David Melville
- Alan E. Rosenbluth
- et al.
- 2010
- SPIE Advanced Lithography 2010
22 nm technology node active layer patterning for planar transistor devices
- Ryoung-Han Kim
- Steven Holmes
- et al.
- 2009
- SPIE Advanced Lithography 2009
32 NM Logic patterning options with immersion lithography
- K. Lai
- S. Burns
- et al.
- 2008
- SPIE Advanced Lithography 2008
The comparison of OPC performance and run time for dense versus sparse solutions
- Amr Abdo
- Ian Stobert
- et al.
- 2008
- SPIE Advanced Lithography 2008
Paving the way to a full chip gate level double patterning application
- Henning Haffner
- Jason Meiring
- et al.
- 2007
- SPIE Photomask Technology + EUV Lithography 2007