On-off charge-voltage characteristics and dopant number fluctuation effects in junctionless double-gate MOSFETs
- Yuan Taur
- Han-Ping Chen
- et al.
- 2012
- IEEE T-ED
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83 results for Yuan Taur
Scaling MOSFETs to 10 nm: Coulomb effects, source starvation, and virtual source
- M.V. Fischetti
- S. Jin
- et al.
- 2009
- IWCE 2009
Scaling MOSFETs to 10 nm: Coulomb effects, source starvation, and virtual source model
- M.V. Fischetti
- S. Jin
- et al.
- 2009
- Journal of Computational Electronics
A 23.8-GHz SOI CMOS tuned amplifier
- Brian A. Floyd
- Leathen Shi
- et al.
- 2002
- IEEE T-MTT
Supply voltage strategies for minimizing the power of CMOS processors
- Jin Cai
- Yuan Taur
- et al.
- 2002
- VLSI Technology 2002
Design considerations for CMOS near the limits of scaling
- David J. Frank
- Yuan Taur
- 2002
- Solid-State Electronics
Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFETs
- Yuan Taur
- 2001
- IEEE Transactions on Electron Devices
New polysilicon disposable sidewall process for sub-50 nm CMOS
- K.L. Lee
- D. Boyd
- et al.
- 2001
- ESSDERC 2001
Device scaling limits of Si MOSFETs and their application dependencies
- David J. Frank
- Robert H. Dennard
- et al.
- 2001
- Proceedings of the IEEE
Mosfet channel length: extraction and interpretation
- Yuan Taur
- 2000
- IEEE Transactions on Electron Devices