Low power passive equalizer optimization using tritonic step response
- Ling Zhang
- Wenjian Yu
- et al.
- 2008
- DAC 2008
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23 results for George A. Katopis
Direct integration of dense parallel optical interconnects on a first level package for high-end servers
- Evan G. Colgan
- Bruce Furman
- et al.
- 2005
- ECTC 2005
Efficient modeling methodology and hardware validation of glass-ceramic based wiring for high-performance single- And multi-chip modules
- Sungjun Chun
- Anand Haridass
- et al.
- 2005
- ECTC 2005
When are transmission-line effects important for on-chip interconnections
- A. Deutsch
- G.V. Kopcsay
- et al.
- 1997
- ECTC 1997
Design methodology of high performance on-chip global interconnect using terminated transmission-line
- Yulei Zhang
- Ling Zhang
- et al.
- 2009
- ISQED 2009
An analysis on measurement sensitivity of short-pulse propagation technique using a virtual test bench
- Zhen Zhou
- Alina Deutsch
- et al.
- 2008
- EPEPS 2008
On-chip bus signaling using passive compensation
- Yulei Zhang
- Ling Zhang
- et al.
- 2008
- EPEPS 2008
Low power passive equalizer design for computer memory links
- Ling Zhang
- Wenjian Yu
- et al.
- 2008
- HOTI 2008
Predicting and optimizing jitter and eye-opening based on bitonic step response
- Haikun Zhu
- Chung-Kuan Cheng
- et al.
- 2007
- IEEE Topical Meeting EPEPS 2007
Determination of transmission line parameters in time- and frequency domain for product related packaging structures
- Thomas-Michael Winkel
- A. Deutsch
- et al.
- 2007
- IEEE-SPI 2007