High-κ/metal-gate fully depleted SOI CMOS with single-silicide schottky source/drain with sub-30-nm gate length
- Marwan H. Khater
- Zhen Zhang
- et al.
- 2010
- IEEE Electron Device Letters
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307 results at IEEE Electron Device Letters
Dual-gate graphene FETs with fT of 50 GHz
- Yu-Ming Lin
- Hsin-Ying Chiu
- et al.
- 2010
- IEEE Electron Device Letters
Reverse temperature dependence of circuit performance in high- k/metal-gate technology
- Shu-Jen Han
- Dechao Guo
- et al.
- 2009
- IEEE Electron Device Letters
Voltage ramp stress for bias temperature instability testing of metal-gate/high- k stacks
- Andreas Kerber
- Siddarth A. Krishnan
- et al.
- 2009
- IEEE Electron Device Letters
Blanket SMT with in situ N2 plasma treatment on the lang;100〉 wafer for the low-cost low-power technology application
- Jun Yuan
- Victor Chan
- et al.
- 2009
- IEEE Electron Device Letters
Relaxing conflict between read stability and writability in 6T SRAM cell using asymmetric transistors
- Jae-Joon Kim
- Aditya Bansal
- et al.
- 2009
- IEEE Electron Device Letters
Lateral strain profile as key technology booster for all-silicon tunnel FETs
- Kathy Boucart
- Adrian Mihai Ionescu
- et al.
- 2009
- IEEE Electron Device Letters
Gate length and performance scaling of undoped-body extremely thin SOI MOSFETs
- Amlan Majumdar
- Xinlin Wang
- et al.
- 2009
- IEEE Electron Device Letters
Dynamic resistance - A metric for variability characterization of phase-change memory
- Bipin Rajendran
- Matt Breitwisch
- et al.
- 2009
- IEEE Electron Device Letters
Mobility scaling in short-channel length strained Ge-on-insulator P-MOSFETs
- Stephen W. Bedell
- Amlan Majumdar
- et al.
- 2008
- IEEE Electron Device Letters