Evaluation methodology for random telegraph noise effects in SRAM arrays
- M. Yamaoka
- Hiroshi Miki
- et al.
- 2011
- IEDM 2011
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23 results at IEDM 2011
Racetrack memory cell array with integrated magnetic tunnel junction readout
- A. Annunziata
- M.C. Gaidis
- et al.
- 2011
- IEDM 2011
New layout dependency in high-k/metal gate MOSFETs
- M. Hamaguchi
- Deleep R. Nair
- et al.
- 2011
- IEDM 2011
High-frequency performance of graphene field effect transistors with saturating IV-characteristics
- Inanc Meric
- Cory R. Dean
- et al.
- 2011
- IEDM 2011
Complementary thin-base symmetric lateral bipolar transistors on SOI
- Jin Cai
- Tak H. Ning
- et al.
- 2011
- IEDM 2011
A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications
- S. Krishnan
- U. Kwon
- et al.
- 2011
- IEDM 2011
Drift-resilient cell-state metric for multilevel phase-change memory
- 2011
- IEDM 2011
Hardware-assisted 3D TCAD for predictive capacitance extraction in 32nm SOI SRAMs
- Ajay N. Bhoj
- Rajiv Joshi
- et al.
- 2011
- IEDM 2011
High device yield carbon nanotube NFETs for high-performance logic applications
- Davood Shahrjerdi
- Aaron D. Franklin
- et al.
- 2011
- IEDM 2011
Impact of TDDB in MG/HK devices on circuit functionality in advanced CMOS technologies
- Andreas Kerber
- D. Lipp
- et al.
- 2011
- IEDM 2011