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Design Optimization of ASIC Designs via AI-driven RTL-to-GDS Optimization with FloorplanningJenn KazdaWachirawit Ponghiranet al.2025DAC 2025
Sequence-Aware Inline Measurement Attribution for Good-Bad Wafer DiagnosisKohei MiyaguchiMasao Jokoet al.2025ASMC 2025
Wafer Defect Root Cause Analysis with Partial Trajectory RegressionKohei MiyaguchiMasao Jokoet al.2025ASMC 2025
Multimodal foundation models for more reproducible scientific experimentation and data capturePatrick RuchGianmarco Gabrieliet al.2024Future Labs Live 2024
Cloud bursting an EDA workload with ML-driven technique for future SoC developmentWachirawit PonghiranJinwook Jung2024VLSI Technology and Circuits 2024
Learning Granger Causality from Instance-wise Self-attentive Hawkes ProcessesDongxia WuIde-San Ideet al.2024AISTATS 2024