Perimeter effects in small geometry bipolar transistors
Wai Lcc, Jack Y.-C. Sun, et al.
VLSI Technology 1992
Silicon bipolar transistors having cutoff frequencies from 40 to 50 GHz have been fabricated in a double-polysilicon self-aligned structure, using a process which relies on ion implantation for the intrinsic base formation. The devices have nearly ideal dc characteristics with breakdown voltages adequate for most digital applications. These results demonstrate that the performance limits of conventional implanted technologies are significantly higher than previously thought. © 1990 IEEE
Wai Lcc, Jack Y.-C. Sun, et al.
VLSI Technology 1992
Keith A. Jenkins, Alan J. Weger
IEEE Electron Device Letters
Emmanuel F. Crabbé, James H. Comfort, et al.
IEEE Electron Device Letters
Joachim N. Burghartz, Michael Hargrove, et al.
IEEE Transactions on Electron Devices