Aditya Bansal, Keunwoo Kim, et al.
ICICDT 2007
Double gate (DG) FET have emerged as the most promising technology for sub-50 nm transistor design. However, analysis and control of the gate tunneling leakage in DGFET is necessary to fully exploit their advantages. In this paper we have modeled (numerically and analytically) and analyzed gate-to-channel leakage in different DGFET structures, namely, doped body symmetric device (SymDG) with polysilicon gates, intrinsic body symmetric device with metal gates (MGDG) and intrinsic body asymmetric device (AsymDG) with different front and back gate materials. It is observed that, use of (near-mid-gap) metal gate and intrinsic body can result in 3-4/spl times/ reduction in gate-to-channel leakage compared to the SymDG structure. © 2005 IEEE.
Aditya Bansal, Keunwoo Kim, et al.
ICICDT 2007
Meng-Hsueh Chiang, Keunwoo Kim, et al.
IEEE International SOI Conference 2004
Phil Oldiges, Ken Rodbell, et al.
IRPS 2015
Saibal Mukhopadhyay, Keunwoo Kim, et al.
IEEE Journal of Solid-State Circuits