Conference paperTechnology viable DC performance elements for Si/SiGe channel CMOS FinFTTG. Tsutsui, Ruqiang Bao, et al.IEDM 2016
Conference paperA novel ALD SiBCN low-k spacer for parasitic capacitance reduction in FinFETsTenko Yamashita, S. Mehta, et al.VLSI Technology 2015
Conference paperPerformance elements for 28nm gate length bulk devices with gate first high-k metal gateJun Yuan, C. Gruensfelder, et al.ICSICT 2010
Conference paperDual beam laser annealing for contact resistance reduction and its impact on VLSI integrated circuit variabilityZuoguang Liu, Oleg Gluschenkov, et al.VLSI Technology 2017