A Switched-Capacitor Integer Compute Unit with Decoupled Storage and Arithmetic for Cloud AI Inference in 5nm CMOS
- Ankur Agrawal
- Monodeep Kar
- et al.
- 2023
- VLSI Technology 2023
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38 results for Sergey V. Rylov
An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS
- A. Serdar Yonar
- Pier Andrea Francese
- et al.
- 2022
- VLSI Technology and Circuits 2022
A 25Gb/s ADC-based serial line receiver in 32nm CMOS SOI
- Sergey V. Rylov
- Troy Beukema
- et al.
- 2016
- ISSCC 2016
A 25Gb/s burst-mode receiver for rapidly reconfigurable optical networks
- Alexander V. Rylyakov
- Jonathan E. Proesel
- et al.
- 2015
- ISSCC 2015
A 28Gb/s 4-tap FFE/15-tap DFE serial link transceiver in 32nm SOI CMOS technology
- John Bulzacchelli
- Troy Beukema
- et al.
- 2012
- ISSCC 2012
A 5.4mW 0.0035mm2 0.48psrms-jitter 0.8-to-5GHz non-PLL/DLL all-digital phase generator/rotator in 45nm SOI CMOS
- Kyu-Hyoun Kim
- Daniel M. Dreps
- et al.
- 2009
- ISSCC 2009
A 78mW 11.1Gb/s 5-tap DFE receiver with digitally calibrated current-integrating summers in 65nm CMOS
- John F. Bulzacchelli
- Timothy O. Dickson
- et al.
- 2009
- ISSCC 2009
A 2.6mW 370MHz-to-2.5GHz open-loop quadrature clock generator
- Kyu-Hyoun Kim
- Paul W. Coteus
- et al.
- 2008
- ISSCC 2008
A 10Gb/s 5-tap-DFE/4-tap-FFE transceiver in 90nm CMOS
- M. Meghelli
- S. Rylov
- et al.
- 2006
- ISSCC 2006
A 30Gb/s 1:4 demultiplexer in 0.12μm CMOS
- Alexander Rylyakov
- Sergey Rylov
- et al.
- 2003
- ISSCC 2003