Reliability monitoring ring oscillator structures for isolated/combined NBTI and PBTI measurement in high-k metal gate technologies
- Jae-Joon Kim
- Barry P. Linder
- et al.
- 2011
- IRPS 2011
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38 results for R.M. Rao
Power optimization methodology for the IBM POWER7 microprocessor
- Victor V. Zyuban
- Joshua Friedrich
- et al.
- 2011
- IBM J. Res. Dev
SRAM write-ability improvement with transient negative bit-line voltage
- Saibal Mukhopadhyay
- Rahul M. Rao
- et al.
- 2011
- IEEE Transactions on VLSI Systems
Technology-circuit co-design of asymmetric SRAM cells for read stability improvement
- Jae-Joon Kim
- Rahul Rao
- et al.
- 2010
- CICC 2010
A centralized supply voltage and local body bias-based compensation approach to mitigate within-die process variation
- Amlan Ghosh
- Rahul M. Rao
- et al.
- 2009
- ISLPED 2009
Impact of NBTI and PBTI in SRAM bit-cells: Relative sensitivities and guidelines for application-specific target stability/performance
- Aditya Bansal
- Rahul Rao
- et al.
- 2009
- IRPS 2009
A precise negative bias temperature instability sensor using slew-rate monitor circuitry
- Amlan Ghosh
- Richard B. Brown
- et al.
- 2009
- ISCAS 2009
A local random variability detector with complete digital on-chip measurement circuitry
- Rahul Rao
- Keith A. Jenkins
- et al.
- 2009
- IEEE Journal of Solid-State Circuits
Relaxing conflict between read stability and writability in 6T SRAM cell using asymmetric transistors
- Jae-Joon Kim
- Aditya Bansal
- et al.
- 2009
- IEEE Electron Device Letters
Impacts of NBTI and PBTI on SRAM static/dynamic noise margins and cell failure probability
- Aditya Bansal
- Rahul Rao
- et al.
- 2009
- Microelectronics Reliability