A 45 nm CMOS node Cu/low-k/ ULtra low-k PECVD SiCOH (k=2.4) BEOL technology
- S. Sankaran
- S. Arai
- et al.
- 2006
- IEDM 2006
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17 results for Glenn Biery
Advanced gate stacks with fully silicided (FUSI) gates and high-κ dielectrics: Enhanced performance at reduced gate leakage
- E. Gusev
- C. Cabral Jr.
- et al.
- 2004
- IEDM 2004
Evaluation of the chemical-mechanical planarization (CMP) performance of silicon nitride and silicon carbide as hard mask materials for Cu-based interconnect technology
- Wei-Tsu Tseng
- Jia Lee
- et al.
- 2002
- MRS Spring Meeting 2002
High performance 0.18 μm SOI CMOS technology
- E. Leobandung
- E. Barth
- et al.
- 1999
- IEDM 1999
Functional high-speed characterization and modeling of a six-layer copper wiring structure and performance comparison with aluminum on-chip interconnections
- A. Deutsch
- H. Harrer
- et al.
- 1998
- IEDM 1998
Competitive and cost effective copper/low-k interconnect (BEOL) for 28nm CMOS technologies
- Rod Augur
- Craig Child
- et al.
- 2010
- ADMETA 2010
UV curing-induced photoresist poisoning in advanced ULK BEOL integration schemes
- Y.C. Ee
- D. Kioussis
- et al.
- 2009
- ADMETA 2009
Advanced bilayer low-k dielectric cap for reliable high performance Cu-low k interconnects
- Griselda Bonilla
- Lawrence A. Clevenger
- et al.
- 2008
- ADMETA 2008
Thermal cycle reliability of stacked via structures with copper metallization and an organic low-k dielectric
- R. Filippi
- J.F. McGrath
- et al.
- 2004
- IRPS 2004
Thermal cycle reliability of stacked via structures with copper metallization and an organic low-k dielectric
- R. Filippi
- J.F. McGrath
- et al.
- 2004
- IRPS 2004