Franco Stellari, Keith A. Jenkins, et al.
IRPS 2015
A bulk silicon divide-by-two dynamic frequency divider with maximum clock speed of 26.5 GHz has been achieved. The dynamic divider operates from 6.5 GHz to 26.5 GHz. The design is based on n-channel MOSFET's with an effective gate length of 0.1 µm. © 2000, The Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
Franco Stellari, Keith A. Jenkins, et al.
IRPS 2015
Keith A. Jenkins, Scott E. Doyle
IEEE Circuits and Devices Magazine
Keith A. Jenkins
SiRF 2004
Dinkar V. Singh, Keith A. Jenkins, et al.
IEEE TNANO