Ruqiang Bao, K. Watanabe, et al.
VLSI Technology 2020
In Nanosheet (NS) device architecture, it is much more challenging than FinFET to develop a suitable multiple threshold voltage (multi-Vt) integration with more restrictive requirement on the dimensions due to the critical dimension scaling and complex structure. In this abstract, we reported an innovative integration scheme to enable volumeless multi-Vt and metal multi-Vt to provide the multi-Vt solutions in NS technology for high performance computing (HPC) and low-power applications. We developed a new volumeless multi-Vt for NS to solve the device geometry constraint and offer more margin and the opportunity for further sheet-to-sheet spacing (Tsus) reduction. Furthermore, metal gate boundary control (MGBC) was developed to enable variable NS widths on the same wafer to satisfy both HPC and low-power applications.
Ruqiang Bao, K. Watanabe, et al.
VLSI Technology 2020
Shanti Pancharatnam, Wei Tsu Tseng, et al.
ECS J. Solid State Sci. Technol.
Ruqiang Bao, Brian Greene, et al.
IEDM 2015
Anshul Gupta, Charu Gupta, et al.
IEEE T-ED