K.N. Tu
Materials Science and Engineering: A
We introduce a planar, triple-self-aligned double-gate FET structure ("PAGODA"). Device fabrication incorporates wafer bonding, front-end CMP, mixed optical/ebeam lithography, silicided silicon source/drain sidewalls, and back gate undercut and passivation. We demonstrate double-gate FET operation with good transport at both interfaces, inverter action, and NOR logic.
K.N. Tu
Materials Science and Engineering: A
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Solid State Communications
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Surface Review and Letters
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Journal of Magnetism and Magnetic Materials