Vertical-Transport Nanosheet Technology for CMOS Scaling beyond Lateral-Transport Devices
- H. Jagannathan
- B. Anderson
- et al.
- 2021
- IEDM 2021
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27 results for T. Levin
A 14 nm embedded STT-MRAM CMOS technology
- Daniel C. Edelstein
- M. Rizzolo
- et al.
- 2020
- IEDM 2020
Yield learning methodologies and failure isolation in ring oscillator circuit for CMOS technology research
- Victor Chan
- Kangguo Cheng
- et al.
- 2019
- IEEE Trans Semicond Manuf
Failure isolation in ring oscillator circuit and defect detection in CMOS technology research
- Victor Chan
- M. Bergendahl
- et al.
- 2019
- ASMC 2019
Leakage aware Si/SiGe CMOS FinFET for low power applications
- G. Tsutsui
- C. Durfee
- et al.
- 2018
- VLSI Technology 2018
Ring oscillator yield learning methodologies for CMOS technology research
- Victor Chan
- D. Lea
- et al.
- 2018
- ASMC 2018
Bottom oxidation through STI (BOTS) - A novel approach to fabricate dielectric isolated FinFETs on bulk substrates
- K. Cheng
- S.-C. Seo
- et al.
- 2014
- VLSI Technology 2014
High performance UTBB FDSOI devices featuring 20nm gate length for 14nm node and beyond
- Q. Liu
- M. Vinet
- et al.
- 2013
- IEDM 2013
Hole transport in strained and relaxed sige channel extremely thin SOI MOSFETs
- Ali Khakifirooz
- Kangguo Cheng
- et al.
- 2013
- IEEE Electron Device Letters
Aggressively scaled strained silicon directly on insulator (SSDOI) FinFETs
- A. Khakifirooz
- R. Sreenivasan
- et al.
- 2013
- S3S 2013