B.A. Hutchins, T.N. Rhodin, et al.
Surface Science
ESD robustness of 4 kV HBM is achieved in CMOS-on-SOI ESD protection networks in an advanced sub-0.25 μm mainstream CMOS-on-SOI technology. Design layout, body contact, floating-gate effects and novel ESD protection implementations are discussed. © 1998 Elsevier Science B.V.
B.A. Hutchins, T.N. Rhodin, et al.
Surface Science
R.J. Gambino, N.R. Stemple, et al.
Journal of Physics and Chemistry of Solids
John G. Long, Peter C. Searson, et al.
JES
A. Gupta, R. Gross, et al.
SPIE Advances in Semiconductors and Superconductors 1990