R.W. Gammon, E. Courtens, et al.
Physical Review B
A novel structure and technology has been developed for high performance CMOS using hybrid silicon substrates with different crystal orientations (namely pFET on (110)-oriented surface and nFET on (100) surface) through wafer bonding and selective epitaxy. CMOS devices with physical gate oxide thickness of 1.2nm have been demonstrated, with substantial enhancement of pFET drive current at L poly≤80nm.
R.W. Gammon, E. Courtens, et al.
Physical Review B
Z. Ren, M.V. Fischetti, et al.
IEDM 2003
R.M. Macfarlane, R.L. Cone
Physical Review B - CMMP
I. Morgenstern, K.A. Müller, et al.
Physica B: Physics of Condensed Matter