Z. Luo, A. Steegen, et al.
IEDM 2004
Thermally stable dual work function metal gates are demonstrated using a conventional CMOS process flow. The gate structure consists of poly-Si/metal nitrides (MN x)/ SiON (or high-k)/Si stack with atomic layer deposition (ALD)-TaN x for the NFET and ALD-WN x for the PFET. Much enhanced drive current (I d) and transconductance (G m) values, and reduced off current (I off) characteristics were attained with ALD-MN x gated devices over control poly-Si and PVD-MN x devices within controllable V t shifts. Excellent scalability of dual work function MN x/high-k gate stack was demonstrated: the EOT was down to 6.6A° with low leakage in a low thermal budget device scheme.
Z. Luo, A. Steegen, et al.
IEDM 2004
J. Yuan, S.S. Tan, et al.
VLSI Technology 2006
Sufi Zafar, Byoung H. Lee, et al.
VLSI Technology 2004
B. Doris, Y. Zhang, et al.
VLSI Technology 2004